Danube River v2

After more than a week of hacking, and a lot of cursing due to so much having changed in GDS Factory in the last year, I finally have Danube River work properly again.

I even finally got around and updated the wiki page and fixed some open bugs which have been open for a year now.

Besides finally properly stating the expected area size of the capacitors in the PDF also, instead of only in the CSV, I now also have more infos about the pin assignment and how to measure it in the exported PDF.

It’s really annoying that while GDS Factory broke Danube River with all their changes, their basic components still aren’t really very useful when it comes to auto-generating my circuits for the project I had to bring LibrePDK back up to speed for.

I’ve considered using GDSPy only but unfortunately I require some of the facilitation tools they’re providing like a proper snap to grid function and so.

At least I got around updating the wiki page for the Libre Silicon Stack now, and there’s now finally a page for the LibrePDK

Next step now is to get the Standard Cell Generator to spit out standard cells again.

Refactoring the DanubeRiver/LibrePDK

It has been a year since I had last time touching the code of my test wafer generator, and I was hoping that others might keep maintaining my code and keep it up to date, but instead folks just walked away after the first minor dependency changes.

The idea of DanubeRiver is to call all the generator functions from LibrePDK and generating test structures for characterizing any given process.

The original code can be found on my GitLab repository here:
https://gitlab.libresilicon.com/generator-tools/danube-river

The output rendering for GF180MCU, which can be found in tapeout/gf180.gds is shown below.

However, in the meanwhile, lots of code in gdsfactory has changed and after several days of intensive hacking I finally got LibrePDK and Danube River to finally spit out a GDS file at all containing structures which at least kind of resemble the original test structures, as can be shown below, but it’s still kind of out of wack.

I keep on working on Danube River and LibrePDK in the next few days and try bringing it up to speed, fixing all the bugs currently still present.

I’ll be doing so in the refactor branches of LibrePDK and Danube River and will merge them into master after some rebasing.

Those are the repos, I still need to update the documentation on the Wiki page for addressing some changes when it comes to installation of the tool.

Problem,s yet to be solved

  • Interconnect: The routing has changed
  • Area of capacitor electrodes needs a slight rework
  • Spacing around the transistor structures is broken